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00022 #include "Epwm.h"
00023 #include "cpu.h"
00024 #include "gpio.h"
00025
00026
00027
00028
00029 volatile struct PWM3phConfiguration pwmConf;
00030 volatile struct PWM3phConfiguration pwmAConf;
00031 volatile struct PWM3phConfiguration pwmBConf;
00032 extern const Uint16 _offsetPWM;
00033 volatile struct EPWM_REGS *ePWM[] = {&EPwm1Regs, &EPwm2Regs, &EPwm3Regs, &EPwm4Regs,
00034 &EPwm5Regs, &EPwm6Regs};
00035 volatile Uint16* cmpPtr[PWM_OUTPUTS_SIZE];
00036 int MEP_ScaleFactor[PWM_CH] = {0,0,0,0,0};
00037 int MEP_SF1, MEP_SF2, MEP_SF3, MEP_SF4, MEP_SF5, MEP_SF6;
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055 static const Uint16 clkMat[] = {1, 2, 4, 8, 32, 64, 128};
00056
00057 static const Uint16 hspClkMat[] = {1, 2, 4, 6, 8, 10, 12};
00058
00059 static const Uint16 hspClkIndxMat[] = {0, 1, 2, 3, 4, 5, 6, 4, 5, 6, 4, 5, 6,
00060 4, 5, 6, 2, 3, 4, 5, 6, 4, 5, 6, 4, 5, 6};
00061
00062 static const Uint16 lspClkIndxMat[] = {0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2,
00063 3, 3, 3, 4, 4, 4, 4, 4, 5, 5, 5, 6, 6, 6};
00064
00065
00066
00067
00068
00069 void BindPWMOutputs(void)
00070 {
00071 int i;
00072
00073 cmpPtr[PWM1+TOP] = &(EPwm1Regs.CMPA.half.CMPA);
00074 cmpPtr[PWM1+BOTTOM] = &(EPwm1Regs.CMPB);
00075 cmpPtr[PWM2+TOP] = &(EPwm2Regs.CMPA.half.CMPA);
00076 cmpPtr[PWM2+BOTTOM] = &(EPwm2Regs.CMPB);
00077 cmpPtr[PWM3+TOP] = &(EPwm3Regs.CMPA.half.CMPA);
00078 cmpPtr[PWM3+BOTTOM] = &(EPwm3Regs.CMPB);
00079 cmpPtr[PWM4+TOP] = &(EPwm4Regs.CMPA.half.CMPA);
00080 cmpPtr[PWM4+BOTTOM] = &(EPwm4Regs.CMPB);
00081 cmpPtr[PWM5+TOP] = &(EPwm5Regs.CMPA.half.CMPA);
00082 cmpPtr[PWM5+BOTTOM] = &(EPwm5Regs.CMPB);
00083 cmpPtr[PWM6+TOP] = &(EPwm6Regs.CMPA.half.CMPA);
00084 cmpPtr[PWM6+BOTTOM] = &(EPwm6Regs.CMPB);
00085
00086 for(i=0;i<PWM_CH;i++){
00087 MEP_ScaleFactor[i] =0;
00088 }
00089
00090
00091 for(i=1;i<PWM_CH;i++){
00092 while ( SFO_MepDis_V5(i) == SFO_INCOMPLETE );
00093 }
00094
00095
00096 MEP_ScaleFactor[0] = MEP_ScaleFactor[1];
00097
00098 }
00099
00100
00101
00103 static inline void CalculatePrescalerBits(Uint16 tpwm_us,Uint16* hspClkDiv, Uint16* clkDiv)
00104 {
00105
00106 const Uint16 maxIndx = 28;
00107 const Uint32 initVal = (Uint32)tpwm_us*CpuInMhz();
00108 Uint32 ctrVal = initVal;
00109 Uint16 indx;
00110 for (indx = 0;indx<maxIndx;indx++) {
00111 ctrVal = initVal/(hspClkMat[hspClkIndxMat[indx]]*
00112 clkMat[lspClkIndxMat[indx]]);
00113 if(ctrVal<=65535)
00114 break;
00115 }
00116 *hspClkDiv = hspClkIndxMat[indx];
00117 *clkDiv = lspClkIndxMat[indx];
00118 }
00119
00120
00121
00122 void InitSinglePWMOutput(void(*interruptFCN)(void), ePWMenum PWM, Uint16 tpwm_us,
00123 PWMMODE pwmMode, PWMCARRIER pwmCarrier, PWMMODULATION modulation, INTSEL intSel,
00124 SWITCHLOGIC switchLogic)
00125 {
00126 volatile struct EPWM_REGS* pwmPtr = ePWM[PWM];
00127 Uint16 PRRSC = 1;
00128 Uint16 hspClkDiv, clkDiv;
00129 InitEPWMGpio(PWM);
00130
00131 cmpPtr[PWM+TOP] = &(pwmPtr->CMPA.half.CMPA);
00132 cmpPtr[PWM+BOTTOM] = &(pwmPtr->CMPB);
00133
00134 EALLOW;
00135 SysCtrlRegs.PCLKCR1.all |= 1 << PWM;
00136
00137
00138 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00139 EDIS;
00140
00141
00142 CalculatePrescalerBits(tpwm_us,&hspClkDiv, &clkDiv);
00143 pwmPtr->TBCTL.bit.CLKDIV = clkDiv;
00144 pwmPtr->TBCTL.bit.HSPCLKDIV = hspClkDiv;
00145 PRRSC *= (1 << pwmPtr->TBCTL.bit.CLKDIV);
00146 if(pwmPtr->TBCTL.bit.HSPCLKDIV != TB_DIV1)
00147 PRRSC *= 2*pwmPtr->TBCTL.bit.HSPCLKDIV;
00148
00149
00150 pwmPtr->TBCTL.bit.CTRMODE = pwmCarrier;
00151 pwmPtr->TBCTL.bit.PRDLD = TB_IMMEDIATE;;
00152
00153 if(pwmCarrier == TB_COUNT_UPDOWN)
00154 pwmPtr->TBPRD = US2CLOCK(tpwm_us, PRRSC)/2;
00155 else if(pwmCarrier == TB_COUNT_UP)
00156 pwmPtr->TBPRD = US2CLOCK(tpwm_us, PRRSC)-1;
00157 pwmPtr->TBCTL.bit.PHSEN = TB_DISABLE;
00158 pwmPtr->TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
00159
00160 pwmPtr->CMPCTL.bit.SHDWAMODE = CC_SHADOW;
00161 pwmPtr->CMPCTL.bit.SHDWBMODE = CC_SHADOW;
00162 pwmPtr->CMPCTL.bit.LOADAMODE = modulation;
00163 pwmPtr->CMPCTL.bit.LOADBMODE = modulation;
00164
00165 pwmPtr->AQCTLA.bit.CAU = ~switchLogic;
00166 pwmPtr->AQCTLA.bit.CAD = switchLogic;
00167 pwmPtr->AQCTLA.bit.PRD = switchLogic;
00168 pwmPtr->AQCTLB.bit.CBU = ~switchLogic;
00169 pwmPtr->AQCTLA.bit.CBD = switchLogic;
00170 pwmPtr->AQCTLB.bit.PRD = switchLogic;
00171
00172 if(pwmMode == HRPWM_MODE){
00173 EALLOW;
00174 pwmPtr->HRCNFG.all = 0x0;
00175 pwmPtr->HRCNFG.bit.EDGMODE = HR_FEP;
00176 pwmPtr->HRCNFG.bit.CTLMODE = HR_CMP;
00177 pwmPtr->HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
00178
00179
00180
00181
00182 EDIS;
00183 }
00184 if(interruptFCN !=0){
00185 pwmPtr->ETSEL.bit.INTSEL = intSel;
00186 pwmPtr->ETSEL.bit.INTEN = 1;
00187 pwmPtr->ETPS.bit.INTPRD = ET_1ST;
00188
00189 EALLOW;
00190 *(&PieVectTable.EPWM1_INT + PWM) = interruptFCN;
00191 EDIS;
00192
00193 IER |= M_INT3;
00194
00195 PieCtrlRegs.PIEIER3.all |= 1 << PWM;
00196 }
00197 }
00198
00199
00200
00201 void InitComplementaryPWMOutput(void(*interruptFCN)(void), ePWMenum PWM, Uint16 tpwm_us,
00202 Uint16 db_us, PWMMODE pwmMode, PWMCARRIER pwmCarrier, PWMMODULATION modulation,
00203 INTSEL intSel, SWITCHLOGIC switchLogic)
00204 {
00205 volatile struct EPWM_REGS* pwmPtr = ePWM[PWM];
00206 InitEPWMGpio(PWM);
00207
00208 cmpPtr[PWM+TOP] = &(pwmPtr->CMPA.half.CMPA);
00209
00210 EALLOW;
00211 SysCtrlRegs.PCLKCR1.all |= 1 << PWM;
00212
00213
00214 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00215 EDIS;
00216 ConfigurePWMLeg(pwmPtr, MASTERPWM, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00217
00218 if(pwmMode == HRPWM_MODE){
00219 EALLOW;
00220 pwmPtr->HRCNFG.all = 0x0;
00221 pwmPtr->HRCNFG.bit.EDGMODE = HR_FEP;
00222 pwmPtr->HRCNFG.bit.CTLMODE = HR_CMP;
00223 pwmPtr->HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
00224
00225
00226
00227
00228 EDIS;
00229 }
00230 if(interruptFCN !=0){
00231 pwmPtr->ETSEL.bit.INTSEL = intSel;
00232 pwmPtr->ETSEL.bit.INTEN = 1;
00233 pwmPtr->ETPS.bit.INTPRD = ET_1ST;
00234
00235 EALLOW;
00236 *(&PieVectTable.EPWM1_INT + PWM) = interruptFCN;
00237 EDIS;
00238
00239 IER |= M_INT3;
00240
00241 PieCtrlRegs.PIEIER3.all |= 1 << PWM;
00242 }
00243 }
00244
00245
00246
00247 void Init3phPWM(void(*interruptFCN)(void), EPWMX epwmX, Uint16 tpwm_us,
00248 Uint16 db_us, PWMCARRIER pwmCarrier, PWMMODULATION modulation, INTSEL intSel,
00249 _iq vBus, ePWMSOC soc, SWITCHLOGIC switchLogic)
00250 {
00251 volatile struct EPWM_REGS* pwm1Ptr = 0;
00252 volatile struct EPWM_REGS* pwm2Ptr = 0;
00253 volatile struct EPWM_REGS* pwm3Ptr = 0;
00254 pwmConf.epwmX = epwmX;
00255 pwmConf.t_pwm = tpwm_us;
00256 if(epwmX == EPWMA){
00257 InitEPWMGpio(PWM1);
00258 InitEPWMGpio(PWM2);
00259 InitEPWMGpio(PWM3);
00260 pwm1Ptr = &EPwm1Regs;
00261 pwm2Ptr = &EPwm2Regs;
00262 pwm3Ptr = &EPwm3Regs;
00263 }
00264 else{
00265 InitEPWMGpio(PWM4);
00266 InitEPWMGpio(PWM5);
00267 InitEPWMGpio(PWM6);
00268 pwm1Ptr = &EPwm4Regs;
00269 pwm2Ptr = &EPwm5Regs;
00270 pwm3Ptr = &EPwm6Regs;
00271 }
00272
00273 pwmConf.cmp1 = &(pwm1Ptr->CMPA.half.CMPA);
00274 pwmConf.cmp2 = &(pwm2Ptr->CMPA.half.CMPA);
00275 pwmConf.cmp3 = &(pwm3Ptr->CMPA.half.CMPA);
00276
00277 InitPWMPeripheralClocks();
00278
00279
00280 EALLOW;
00281 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00282 EDIS;
00283 ConfigurePWMLeg(pwm1Ptr, MASTERPWM, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00284 ConfigurePWMLeg(pwm2Ptr, SLAVEPWM, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00285 ConfigurePWMLeg(pwm3Ptr, SLAVEPWM, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00286
00287 pwm1Ptr->ETSEL.bit.INTSEL = intSel;
00288 pwm1Ptr->ETSEL.bit.INTEN = 1;
00289 pwm1Ptr->ETPS.bit.INTPRD = ET_1ST;
00290
00291 if(soc == SOCA){
00292 pwm1Ptr->ETSEL.bit.SOCAEN = 1;
00293 pwm1Ptr->ETSEL.bit.SOCASEL = 1;
00294 pwm1Ptr->ETPS.bit.SOCAPRD = 1;
00295 }
00296 else if(soc == SOCB){
00297 pwm1Ptr->ETSEL.bit.SOCBEN = 1;
00298 pwm1Ptr->ETSEL.bit.SOCBSEL = 1;
00299 pwm1Ptr->ETPS.bit.SOCBPRD = 1;
00300 }
00301 if(interruptFCN != 0){
00302
00303 IER |= M_INT3;
00304 if(epwmX == EPWMA){
00305
00306 EALLOW;
00307 PieVectTable.EPWM1_INT = interruptFCN;
00308 EDIS;
00309 PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
00310 }
00311 else{
00312
00313 EALLOW;
00314 PieVectTable.EPWM4_INT = interruptFCN;
00315 EDIS;
00316 PieCtrlRegs.PIEIER3.bit.INTx4 = 1;
00317 }
00318 }
00319
00320 pwmConf.OFFSETPWM = pwm1Ptr->TBPRD >> 1;
00321 pwmConf.OFFSETPWMDIVVBUS = _IQdiv(_IQ(pwmConf.OFFSETPWM),vBus >> 1);
00322 pwmConf.vBus = vBus;
00323
00324 if(epwmX == EPWMA)
00325 pwmAConf = pwmConf;
00326 else
00327 pwmBConf = pwmConf;
00328 }
00329
00330
00331
00332 void ConfigurePWMLeg(volatile struct EPWM_REGS* pwmPtr, PHSEN master,
00333 Uint16 tpwm_us, Uint16 db_us, PWMCARRIER pwmCarrier, PWMMODULATION modulation,
00334 unsigned int polSel)
00335 {
00336
00337
00338 Uint16 PRRSC = 1;
00339 Uint16 hspClkDiv, clkDiv;
00340
00341 CalculatePrescalerBits(tpwm_us,&hspClkDiv, &clkDiv);
00342 pwmPtr->TBCTL.bit.CLKDIV = clkDiv;
00343 pwmPtr->TBCTL.bit.HSPCLKDIV = hspClkDiv;
00344 PRRSC *= (1 << pwmPtr->TBCTL.bit.CLKDIV);
00345 if(pwmPtr->TBCTL.bit.HSPCLKDIV != TB_DIV1)
00346 PRRSC *= 2*pwmPtr->TBCTL.bit.HSPCLKDIV;
00347
00348
00349
00350 pwmPtr->TBCTL.bit.CTRMODE = pwmCarrier;
00351 if(pwmPtr->TBCTL.bit.CTRMODE == TB_COUNT_UPDOWN)
00352 pwmPtr->TBPRD = US2CLOCK(pwmConf.t_pwm, PRRSC)/2;
00353 else
00354 pwmPtr->TBPRD = US2CLOCK(pwmConf.t_pwm, PRRSC)-1;
00355 pwmPtr->TBPHS.half.TBPHS = 0;
00356 pwmPtr->TBCTL.bit.PHSEN = master;
00357 pwmPtr->TBCTL.bit.PRDLD = CC_SHADOW;
00358 pwmPtr->TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
00359
00360 pwmPtr->CMPCTL.bit.SHDWAMODE = CC_SHADOW;
00361 pwmPtr->CMPCTL.bit.SHDWBMODE = CC_SHADOW;
00362 pwmPtr->CMPCTL.bit.LOADAMODE = modulation;
00363 pwmPtr->CMPCTL.bit.LOADBMODE = modulation;
00364
00365 pwmPtr->AQCTLA.bit.CAU = ~polSel;
00366 pwmPtr->AQCTLA.bit.CAD = polSel;
00367
00368 pwmPtr->DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
00369 pwmPtr->DBCTL.bit.POLSEL = polSel;
00370
00371 pwmPtr->DBFED = US2CLOCK(db_us, PRRSC);
00372 pwmPtr->DBRED = US2CLOCK(db_us, PRRSC);
00373 }
00374
00375
00376
00377
00378 void AddEventTrigger(volatile struct EPWM_REGS* pwmPtr,
00379 ePWMSOC soc, SOCTrigger trigger)
00380 {
00381 if(soc == SOCA){
00382 pwmPtr->ETSEL.bit.SOCAEN = 1;
00383 pwmPtr->ETSEL.bit.SOCASEL = trigger;
00384 pwmPtr->ETPS.bit.SOCAPRD = 1;
00385 }
00386 else if(soc == SOCB){
00387 pwmPtr->ETSEL.bit.SOCBEN = 1;
00388 pwmPtr->ETSEL.bit.SOCBSEL = trigger;
00389 pwmPtr->ETPS.bit.SOCBPRD = 1;
00390 }
00391 }
00392
00393
00394
00395 void InitPWMPeripheralClocks(void)
00396 {
00397 EALLOW;
00398 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00399 if(pwmConf.epwmX == EPWMA){
00400 SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;
00401 SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;
00402 SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;
00403 }
00404 else{
00405 SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1;
00406 SysCtrlRegs.PCLKCR1.bit.EPWM5ENCLK = 1;
00407 SysCtrlRegs.PCLKCR1.bit.EPWM6ENCLK = 1;
00408 }
00409
00410 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
00411 EDIS;
00412 }
00413
00414
00415
00416 void InitPWMAPeripheralClocks(void)
00417 {
00418 EALLOW;
00419 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00420 SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;
00421 SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;
00422 SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;
00423
00424 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
00425 EDIS;
00426 }
00427
00428
00429
00430 void InitPWMBPeripheralClocks(void)
00431 {
00432 EALLOW;
00433 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00434 SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1;
00435 SysCtrlRegs.PCLKCR1.bit.EPWM5ENCLK = 1;
00436 SysCtrlRegs.PCLKCR1.bit.EPWM6ENCLK = 1;
00437
00438 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
00439 EDIS;
00440 }
00441
00442
00443
00444 void InitEPWMGpio(ePWMenum ePWM)
00445 {
00446
00447
00448
00449 switch(ePWM){
00450 case PWM1:
00451 ConfigureGPIOPort(_GPIO0, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00452 ConfigureGPIOPort(_GPIO1, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00453 break;
00454 case PWM2:
00455 ConfigureGPIOPort(_GPIO2, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00456 ConfigureGPIOPort(_GPIO3, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00457 break;
00458 case PWM3:
00459 ConfigureGPIOPort(_GPIO4, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00460 ConfigureGPIOPort(_GPIO5, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00461 break;
00462 case PWM4:
00463 ConfigureGPIOPort(_GPIO6, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00464 ConfigureGPIOPort(_GPIO7, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00465 break;
00466 case PWM5:
00467 ConfigureGPIOPort(_GPIO8, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00468 ConfigureGPIOPort(_GPIO9, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00469 break;
00470 case PWM6:
00471 ConfigureGPIOPort(_GPIO10, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00472 ConfigureGPIOPort(_GPIO11, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00473 break;
00474 }
00475 }
00476
00477
00478
00479 void InitTzGpio(void)
00480 {
00481 EALLOW;
00482
00483
00484
00485
00486
00487 GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;
00488 GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;
00489 GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;
00490 GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;
00491 GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;
00492 GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;
00493
00494
00495
00496
00497
00498
00499 GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3;
00500 GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3;
00501 GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3;
00502 GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3;
00503 GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3;
00504 GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3;
00505
00506
00507
00508
00509
00510 GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;
00511 GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;
00512 GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1;
00513 GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1;
00514 GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 3;
00515 GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 3;
00516
00517 EDIS;
00518 }
00519
00520
00521
00522
00523
00524