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00035 #ifndef EPWM_H
00036 #define EPWM_H
00037
00038
00039
00040
00041 #include "TIMotorLIB.h"
00042 #include GENERATE_FLEX_INC(Device.h)
00043 #include "SFO_V5.h"
00044 #include GENERATE_FLEX_INC(ePwm_defines.h)
00045 #include "IQConstants.h"
00046 #include "Utils.h"
00047
00048
00049
00050
00051
00052 #define EPWM1_INT_ACK (0x1);
00053 #define EPWM2_INT_ACK (0x2);
00054 #define EPWM3_INT_ACK (0x4);
00055 #define EPWM4_INT_ACK (0x8);
00056 #define EPWM5_INT_ACK (0x10);
00057 #define EPWM6_INT_ACK (0x20);
00058
00060 #define PWM_OUTPUTS_SIZE (12)
00061
00062
00063
00064
00065
00067 typedef enum {
00068 EPWMA,
00069 EPWMB
00070 } EPWMX;
00071
00073 typedef enum {
00074 MASTERPWM,
00075 SLAVEPWM
00076 } PHSEN;
00077
00079 typedef enum {
00080 PWM1=0,
00081 PWM2=1,
00082 PWM3=2,
00083 PWM4=3,
00084 PWM5=4,
00085 PWM6=5
00086 } ePWMenum;
00087
00089 typedef enum {
00090 NORMAL_MODE,
00091 HRPWM_MODE
00092 } PWMMODE;
00093
00095 typedef enum {
00096 SAWTOOTH=TB_COUNT_UP,
00097 TRIANGLE=TB_COUNT_UPDOWN
00098 } PWMCARRIER;
00099
00101 typedef enum {
00102 SYMMETRICAL=CC_CTR_ZERO,
00103 ASYMMETRICAL=CC_CTR_ZERO_PRD
00104 } PWMMODULATION;
00105
00107 typedef enum {
00108 CTR_ZERO=ET_CTR_ZERO,
00109 CTR_PRD=ET_CTR_PRD
00110 } INTSEL;
00111
00113 typedef enum {
00114 SOCNULL=0,
00115 SOCA=1,
00116 SOCB=2
00117 } ePWMSOC;
00118
00120 typedef enum {
00121 EvTBeqZERO=1,
00122 EvTBeqPRD=2,
00123 EvTBCNTeqCMPAI=4,
00124 EvTBCNTeqCMPAD=5,
00125 EvTBCNTeqCMPBI=6,
00126 EvTBCNTeqCMPBD=7
00127 } SOCTrigger;
00128
00130 typedef enum {
00131 TOP=0,
00132 BOTTOM=6
00133 } sideEnum;
00134
00136 typedef enum {
00137 NEG_LOGIC=1,
00138 POS_LOGIC=2
00139 } SWITCHLOGIC;
00140
00141
00142
00143
00144
00145
00147 struct PWM3phConfiguration {
00148 Uint16 t_pwm;
00149 Uint16 OFFSETPWM;
00150 _iq OFFSETPWMDIVVBUS;
00151 _iq vBus;
00152 EPWMX epwmX;
00153 volatile Uint16* cmp1;
00154 volatile Uint16* cmp2;
00155 volatile Uint16* cmp3;
00156 volatile Uint16* enable_input;
00157 Uint16 enabled;
00158 };
00159
00161 extern volatile struct PWM3phConfiguration pwmConf;
00162 extern volatile struct PWM3phConfiguration pwmAConf, pwmBConf;
00163
00165 extern volatile struct EPWM_REGS *ePWM[];
00167 extern volatile Uint16* cmpPtr[PWM_OUTPUTS_SIZE];
00168 extern int MEP_ScaleFactor[PWM_CH];
00169 extern int MEP_SF1, MEP_SF2, MEP_SF3, MEP_SF4, MEP_SF5, MEP_SF6;
00170
00171
00172
00173
00174
00175
00176 extern void BindPWMOutputs(void);
00177
00178
00180
00181 extern void InitPWMPeripheralClocks(void);
00182
00183
00185
00186 extern void InitPWMAPeripheralClocks(void);
00187
00188
00190
00191 extern void InitPWMBPeripheralClocks(void);
00192
00193
00206
00207 extern void InitEPWMGpio(ePWMenum PWM);
00208
00209
00222
00223 extern void InitTzGpio(void);
00224
00225
00239
00240 extern void InitSinglePWMOutput(void(*interruptFCN)(void), ePWMenum PWM, Uint16 tpwm_us,
00241 PWMMODE pwmMode, PWMCARRIER pwmCarrier, PWMMODULATION modulation, INTSEL intSel,
00242 SWITCHLOGIC switchLogic);
00243
00244
00259
00260 extern void InitComplementaryPWMOutput(void(*interruptFCN)(void), ePWMenum PWM, Uint16 tpwm_us,
00261 Uint16 db_us, PWMMODE pwmMode, PWMCARRIER pwmCarrier, PWMMODULATION modulation,
00262 INTSEL intSel, SWITCHLOGIC switchLogic);
00263
00264
00265
00282
00283 extern void Init3phPWM(void(*interruptFCN)(void), EPWMX epwmX, Uint16 tpwm_us,
00284 Uint16 db_us, PWMCARRIER pwmCarrier, PWMMODULATION modulation, INTSEL intSel,
00285 _iq vBus, ePWMSOC soc, SWITCHLOGIC switchLogic);
00286
00287
00299
00300 extern void ConfigurePWMLeg(volatile struct EPWM_REGS* pwmPtr, PHSEN master,
00301 Uint16 tpwm_us, Uint16 db_us, PWMCARRIER pwmCarrier, PWMMODULATION modulation,
00302 unsigned int polSel);
00303
00304
00315
00316 extern void AddEventTrigger(volatile struct EPWM_REGS* pwmPtr,
00317 ePWMSOC soc, SOCTrigger trigger);
00318
00319
00320 static inline void SetEnablePWMInput(Uint16* input);
00321 static inline void UpdateEPWM(ePWMenum PWM, sideEnum side, _iq cmp);
00322 static inline void UpdateEPWMDuty(ePWMenum PWM, sideEnum side, _iq duty);
00323 static inline void UpdateHRPWM(ePWMenum PWM, _iq cmp);
00325 static inline void UpdatePWM3ph(_iq vas,_iq vbs,_iq vcs, char saturate);
00326 static inline void UpdatePWMA3ph(_iq vas,_iq vbs,_iq vcs, char saturate);
00327 static inline void UpdatePWMB3ph(_iq vas,_iq vbs,_iq vcs, char saturate);
00329 static inline void UpdatePWMDuty3ph(_iq vad, _iq vbd, _iq vcd);
00330 static inline void UpdatePWMADuty3ph(_iq vad, _iq vbd, _iq vcd);
00331 static inline void UpdatePWMBDuty3ph(_iq vad, _iq vbd, _iq vcd);
00332 static inline void ForceSingleEPWM(ePWMenum PWM, sideEnum side, Uint16 level);
00333 static inline void _ForceSingleEPWM(volatile struct EPWM_REGS * pwmPtr, sideEnum side,
00334 Uint16 level);
00335 static inline void ForceEPWM(ePWMenum PWM, sideEnum side, Uint16 level);
00336 static inline void EnablePWM(Uint16 enable);
00337 static inline void EnableEPWMModuleTBCLK(void);
00338 static inline void EpwmPIEAck(volatile struct EPWM_REGS* epwmRegs);
00339 static inline void EpwmAPIEAck(void);
00340 static inline void EpwmBPIEAck(void);
00341
00342
00343
00344
00345
00346 static inline void SetEnablePWMInput(Uint16* input)
00347 {
00348 pwmConf.enable_input = input;
00349 }
00350
00351
00352
00353 static inline void UpdateEPWM(ePWMenum PWM, sideEnum side, _iq cmp)
00354 {
00355 *(cmpPtr[PWM+side]) = (Uint16)(_IQtoF(cmp));
00356 }
00357
00358
00359
00360 static inline void UpdateEPWMDuty(ePWMenum PWM, sideEnum side, _iq duty)
00361 {
00362 *(cmpPtr[PWM+side]) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(duty),_IQ16(ePWM[PWM]->TBPRD))));
00363 }
00364
00365
00366
00367 static inline void UpdateHRPWM(ePWMenum PWM, _iq cmp)
00368 {
00369 ePWM[PWM]->CMPA.all = (_IQint(cmp*ePWM[PWM]->TBPRD) << 16) +
00370 (((Uint32)(_IQfrac(cmp*ePWM[PWM]->TBPRD*MEP_ScaleFactor[0])) << 8) + 0x180);
00371 }
00372
00373
00374
00375
00377
00378 static inline void UpdatePWM3ph(_iq vas, _iq vbs, _iq vcs, char saturate)
00379 {
00380
00381
00382
00383
00385
00388 if(saturate){
00389 LIM(vas,(long)(pwmConf.vBus)>>1);
00390 LIM(vbs,(long)(pwmConf.vBus)>>1);
00391 LIM(vcs,(long)(pwmConf.vBus)>>1);
00392 }
00396 *(pwmConf.cmp1) = (Uint16)(_IQtoF(_IQmpy(vas,pwmConf.OFFSETPWMDIVVBUS)));
00397 *(pwmConf.cmp2) = (Uint16)(_IQtoF(_IQmpy(vbs,pwmConf.OFFSETPWMDIVVBUS)));
00398 *(pwmConf.cmp3) = (Uint16)(_IQtoF(_IQmpy(vcs,pwmConf.OFFSETPWMDIVVBUS)));
00399
00400
00401
00402 }
00403
00404
00405
00406
00412
00413 static inline void UpdatePWMA3ph(_iq vas, _iq vbs, _iq vcs, char saturate)
00414 {
00416 if(saturate){
00417 LIM(vas,(long)(pwmAConf.vBus)>>1);
00418 LIM(vbs,(long)(pwmAConf.vBus)>>1);
00419 LIM(vcs,(long)(pwmAConf.vBus)>>1);
00420 }
00424 *(pwmAConf.cmp1) = (Uint16)(_IQtoF(_IQmpy(vas,pwmAConf.OFFSETPWMDIVVBUS)));
00425 *(pwmAConf.cmp2) = (Uint16)(_IQtoF(_IQmpy(vbs,pwmAConf.OFFSETPWMDIVVBUS)));
00426 *(pwmAConf.cmp3) = (Uint16)(_IQtoF(_IQmpy(vcs,pwmAConf.OFFSETPWMDIVVBUS)));
00427 }
00428
00429
00430
00431
00437
00438 static inline void UpdatePWMB3ph(_iq vas, _iq vbs, _iq vcs, char saturate)
00439 {
00441 if(saturate){
00442 LIM(vas,(long)(pwmBConf.vBus)>>1);
00443 LIM(vbs,(long)(pwmBConf.vBus)>>1);
00444 LIM(vcs,(long)(pwmBConf.vBus)>>1);
00445 }
00449 *(pwmBConf.cmp1) = (Uint16)(_IQtoF(_IQmpy(vas,pwmBConf.OFFSETPWMDIVVBUS)));
00450 *(pwmBConf.cmp2) = (Uint16)(_IQtoF(_IQmpy(vbs,pwmBConf.OFFSETPWMDIVVBUS)));
00451 *(pwmBConf.cmp3) = (Uint16)(_IQtoF(_IQmpy(vcs,pwmBConf.OFFSETPWMDIVVBUS)));
00452 }
00453
00454
00455
00456
00458
00459 static inline void UpdatePWMDuty3ph(_iq vad, _iq vbd, _iq vcd)
00460 {
00461
00462
00463
00464
00465
00466
00467
00468
00469 *(pwmConf.cmp1) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vad),(_IQ16(pwmConf.OFFSETPWM << 1)))));
00470 *(pwmConf.cmp2) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vbd),(_IQ16(pwmConf.OFFSETPWM << 1)))));
00471 *(pwmConf.cmp3) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vcd),(_IQ16(pwmConf.OFFSETPWM << 1)))));
00472 }
00473
00474
00475
00476
00483
00484 static inline void UpdatePWMADuty3ph(_iq vad, _iq vbd, _iq vcd)
00485 {
00493 *(pwmAConf.cmp1) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vad),(_IQ16(pwmAConf.OFFSETPWM << 1)))));
00494 *(pwmAConf.cmp2) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vbd),(_IQ16(pwmAConf.OFFSETPWM << 1)))));
00495 *(pwmAConf.cmp3) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vcd),(_IQ16(pwmAConf.OFFSETPWM << 1)))));
00496 }
00497
00498
00499
00500
00507
00508 static inline void UpdatePWMBDuty3ph(_iq vad, _iq vbd, _iq vcd)
00509 {
00510
00511
00512
00513
00514
00515
00516
00517
00518 *(pwmBConf.cmp1) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vad),(_IQ16(pwmBConf.OFFSETPWM << 1)))));
00519 *(pwmBConf.cmp2) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vbd),(_IQ16(pwmBConf.OFFSETPWM << 1)))));
00520 *(pwmBConf.cmp3) = (Uint16)(_IQ16toF(_IQ16mpy(_IQtoIQ16(vcd),(_IQ16(pwmBConf.OFFSETPWM << 1)))));
00521 }
00522
00523
00524
00525
00527
00528 static inline void ForceSingleEPWM(ePWMenum PWM, sideEnum side, Uint16 level)
00529 {
00530 _ForceSingleEPWM(ePWM[PWM], side, level);
00531 }
00532
00533
00534
00535
00540
00541 static inline void _ForceSingleEPWM(volatile struct EPWM_REGS * pwmPtr,
00542 sideEnum side, Uint16 level)
00543 {
00544 pwmPtr->AQSFRC.bit.RLDCSF = 3;
00545 if(side == TOP){
00546 pwmPtr->AQSFRC.bit.ACTSFA = level+1;
00547 pwmPtr->AQSFRC.bit.OTSFA=1;
00548 }
00549 else{
00550 pwmPtr->AQSFRC.bit.ACTSFB = level+1;
00551 pwmPtr->AQSFRC.bit.OTSFB=1;
00552 }
00553 }
00554
00555
00556
00557
00562
00563 static inline void ForceEPWM(ePWMenum PWM, sideEnum side, Uint16 level)
00564 {
00565 if(side == TOP)
00566 ePWM[PWM]->AQCSFRC.bit.CSFA = level+1;
00567 else
00568 ePWM[PWM]->AQCSFRC.bit.CSFB = level+1;
00569
00570 }
00571
00572
00573
00574
00576
00577 static inline void EnablePWM(Uint16 enable)
00578 {
00579
00580 pwmConf.enabled = enable;
00581 }
00582
00583
00584
00585
00587
00588 static inline void EnableEPWMModuleTBCLK(void)
00589 {
00590
00591 EALLOW;
00592 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
00593 EDIS;
00594 }
00595
00596
00597
00598
00602
00603 static inline void EpwmPIEAck(volatile struct EPWM_REGS* epwmRegs)
00604 {
00605
00606 PieCtrlRegs.PIEACK.all |= PIEACK_GROUP3;
00607
00608 epwmRegs->ETCLR.bit.INT = 1;
00609 }
00610
00611
00612
00613
00616
00617 static inline void EpwmAPIEAck(void)
00618 {
00619 EpwmPIEAck(&EPwm1Regs);
00620 }
00621
00622
00623
00624
00627
00628 static inline void EpwmBPIEAck(void)
00629 {
00630 EpwmPIEAck(&EPwm4Regs);
00631 }
00632
00633
00634
00635 #endif
00636
00637
00638
00639