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00041 #ifndef ADC_H
00042 #define ADC_H
00043
00044
00045
00046
00047 #include "TIMotorLIB.h"
00048 #include GENERATE_FLEX_INC(Device.h)
00049 #include "IQConstants.h"
00050 #include "DataStorage.h"
00051
00052
00053
00054
00055
00056
00057 #define MAX_CH 16
00058 #define ADCINA0 0
00059 #define ADCINA1 1
00060 #define ADCINA2 2
00061 #define ADCINA3 3
00062 #define ADCINA4 4
00063 #define ADCINA5 5
00064 #define ADCINA6 6
00065 #define ADCINA7 7
00066 #define ADCINB0 8
00067 #define ADCINB1 9
00068 #define ADCINB2 10
00069 #define ADCINB3 11
00070 #define ADCINB4 12
00071 #define ADCINB5 13
00072 #define ADCINB6 14
00073 #define ADCINB7 15
00074
00075 #define CH0_RAW ((AdcRegs.ADCRESULT0 & 0xFFF0) >> 4)
00076 #define CH1_RAW ((AdcRegs.ADCRESULT1 & 0xFFF0) >> 4)
00077 #define CH2_RAW ((AdcRegs.ADCRESULT2 & 0xFFF0) >> 4)
00078 #define CH3_RAW ((AdcRegs.ADCRESULT3 & 0xFFF0) >> 4)
00079 #define CH4_RAW ((AdcRegs.ADCRESULT4 & 0xFFF0) >> 4)
00080 #define CH5_RAW ((AdcRegs.ADCRESULT5 & 0xFFF0) >> 4)
00081 #define CH6_RAW ((AdcRegs.ADCRESULT6 & 0xFFF0) >> 4)
00082 #define CH7_RAW ((AdcRegs.ADCRESULT7 & 0xFFF0) >> 4)
00083 #define CH8_RAW ((AdcRegs.ADCRESULT8 & 0xFFF0) >> 4)
00084 #define CH9_RAW ((AdcRegs.ADCRESULT9 & 0xFFF0) >> 4)
00085 #define CH10_RAW ((AdcRegs.ADCRESULT10 & 0xFFF0) >> 4)
00086 #define CH11_RAW ((AdcRegs.ADCRESULT11 & 0xFFF0) >> 4)
00087 #define CH12_RAW ((AdcRegs.ADCRESULT12 & 0xFFF0) >> 4)
00088 #define CH13_RAW ((AdcRegs.ADCRESULT13 & 0xFFF0) >> 4)
00089 #define CH14_RAW ((AdcRegs.ADCRESULT14 & 0xFFF0) >> 4)
00090 #define CH15_RAW ((AdcRegs.ADCRESULT15 & 0xFFF0) >> 4)
00091
00092 #define CH0_RAW_MIRROW (AdcMirror.ADCRESULT0)
00093 #define CH1_RAW_MIRROW (AdcMirror.ADCRESULT1)
00094 #define CH2_RAW_MIRROW (AdcMirror.ADCRESULT2)
00095 #define CH3_RAW_MIRROW (AdcMirror.ADCRESULT3)
00096 #define CH4_RAW_MIRROW (AdcMirror.ADCRESULT4)
00097 #define CH5_RAW_MIRROW (AdcMirror.ADCRESULT5)
00098 #define CH6_RAW_MIRROW (AdcMirror.ADCRESULT6)
00099 #define CH7_RAW_MIRROW (AdcMirror.ADCRESULT7)
00100 #define CH8_RAW_MIRROW (AdcMirror.ADCRESULT8)
00101 #define CH9_RAW_MIRROW (AdcMirror.ADCRESULT9)
00102 #define CH10_RAW_MIRROW (AdcMirror.ADCRESULT10)
00103 #define CH11_RAW_MIRROW (AdcMirror.ADCRESULT11)
00104 #define CH12_RAW_MIRROW (AdcMirror.ADCRESULT12)
00105 #define CH13_RAW_MIRROW (AdcMirror.ADCRESULT13)
00106 #define CH14_RAW_MIRROW (AdcMirror.ADCRESULT14)
00107 #define CH15_RAW_MIRROW (AdcMirror.ADCRESULT15)
00108
00109 #define BITS2VOLTS(bits) ((bits >> 12)*3 + ADCLO)
00110
00111 #define VOLTS2BITS(volts) (4096/3*(volts - ADCLO))
00112
00113 #define AD_ORIGIN (2048)
00114
00115
00116
00117
00118
00119
00121 typedef enum {
00122 CASCADED_MODE=0,
00123 SIMULTANEOUS_MODE=1
00124 } SAMPLING_MODE;
00125
00127 typedef enum {
00128 INDEPENDENT_SEQ_MODE=0,
00129 CASCADED_SEQ_MODE=1
00130 } SEQ_MODE;
00131
00133 typedef enum {
00134 PWM_SOC=(int)0x8901,
00135 GPIO_SOC=0x0080,
00136 SW_SOC=0x0000
00137 } SOC_MODE;
00138
00140 typedef enum {
00141 UNIPOLAR=0,
00142 BIPOLAR=1
00143 } POLARITY;
00144
00145
00148
00149 struct ADConfiguration {
00150 Uint16 chlChannels[MAX_CH];
00151 Uint16 convChannel[MAX_CH];
00152 _iq chlGains[MAX_CH];
00153 _iq chlOffsets[MAX_CH];
00154 Uint16 chlPolarity[MAX_CH];
00155 volatile Uint16* selSeqPtr;
00156 Uint16 max_ch;
00157 volatile Uint16 trigger;
00158 Uint16 fAD;
00159 Uint16 tSH;
00160 };
00161
00162 extern struct ADConfiguration adConfiguration;
00163
00164
00165
00166
00167
00168
00169
00170
00171
00184
00185 extern void ConfigureAD(void(*interruptFCN)(void), _iq fAD, Uint16 tSH,
00186 SEQ_MODE seqMode, SAMPLING_MODE samplingMode, SOC_MODE socMode,
00187 Uint16 offtrim);
00188
00189
00195
00196 extern void AddChannel(Uint16 input, Uint16 channel, _iq offset, _iq gain);
00197
00198
00204
00205 extern void AddUnipolarChannel(Uint16 input, Uint16 channel, _iq offset, _iq gain);
00206
00207
00208
00210
00211 extern void InitAD(void);
00212
00213
00215
00216 extern void InitADPeripheralClocks(void);
00217
00218
00222
00223 static inline void ReinitADSEQ1(void);
00224
00225
00229
00230 static inline void ReinitADSEQ2(void);
00231
00232
00234
00235 static inline void SetTrigger(void);
00236
00237
00239
00240 static inline void ResetTrigger(void);
00241
00242
00243
00247
00248 static inline Uint16 ReadADChannelRaw(Uint16 channel);
00249
00250
00254
00255 static inline Uint16 ReadADInputRaw(Uint16 input);
00256
00257
00261
00262 static inline Uint16 ReadADChannelRawWriteRaw(Uint16 channel);
00263
00264
00268
00269 static inline Uint16 ReadADInputRawWriteRaw(Uint16 input);
00270
00271
00275
00276 static inline _iq ReadADInput(Uint16 input);
00277
00278
00282
00283 static inline _iq ReadADInputWriteRaw(Uint16 input);
00284
00285
00291
00292 static inline void ReadADSimultaneousInputWriteRaw(Uint16 aInput, Uint16 bInput,
00293 volatile _iq* aVal, volatile _iq* bVal);
00294
00295
00296
00301
00302 static inline _iq Bits2Units(Uint16 rawVal, Uint16 input);
00303
00304
00305
00306
00307
00308
00309
00311 static inline void ReinitADSEQ1(void)
00312 {
00313
00314 AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;
00315 AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
00316 PieCtrlRegs.PIEACK.all |= PIEACK_GROUP1;
00317 }
00318
00319
00320
00322 static inline void ReinitADSEQ2(void)
00323 {
00324
00325 AdcRegs.ADCTRL2.bit.RST_SEQ2 = 1;
00326 AdcRegs.ADCST.bit.INT_SEQ2_CLR = 1;
00327 PieCtrlRegs.PIEACK.all |= PIEACK_GROUP1;
00328 }
00329
00330
00331
00332
00334
00335 static inline void SetTrigger(void)
00336 {
00337 adConfiguration.trigger=1;
00338 }
00339
00340
00341
00342
00343
00344
00346
00347 static inline void ResetTrigger(void)
00348 {
00349 adConfiguration.trigger=0;
00350 }
00351
00352
00353
00354
00355
00356
00358
00359 static inline Uint16 ReadADChannelRaw(Uint16 channel)
00360 {
00361 return *(&AdcMirror.ADCRESULT0 + channel);
00362 }
00363
00364
00365
00366
00368
00369 static inline Uint16 ReadADInputRaw(Uint16 input)
00370 {
00371 return *(&AdcMirror.ADCRESULT0 + adConfiguration.chlChannels[input]);
00372 }
00373
00374
00375
00376
00378
00379 static inline Uint16 ReadADChannelRawWriteRaw(Uint16 channel)
00380 {
00381 Uint16 rawVal=ReadADInputRaw(channel);
00382 if(adConfiguration.trigger){
00383 WriteData(&rawVal);
00384 }
00385 return rawVal;
00386 }
00387
00388
00389
00390
00392
00393 static inline Uint16 ReadADInputRawWriteRaw(Uint16 input)
00394 {
00395 Uint16 rawVal=ReadADInputRaw(input);
00396 if(adConfiguration.trigger){
00397 WriteData(&rawVal);
00398 }
00399 return rawVal;
00400 }
00401
00402
00403
00404
00405
00407
00408 static inline _iq ReadADInput(Uint16 input)
00409 {
00410 Uint16 rawVal=ReadADInputRaw(input);
00411 return Bits2Units(rawVal, input);
00412 }
00413
00414
00415
00416
00418
00419 static inline _iq ReadADInputWriteRaw(Uint16 input)
00420 {
00421 Uint16 rawVal=ReadADInputRaw(input);
00422 if(adConfiguration.trigger){
00423 WriteData(&rawVal);
00424 }
00425 return Bits2Units(rawVal, input);
00426 }
00427
00428
00429
00430
00433
00434 static inline void ReadADSimultaneousInputWriteRaw(Uint16 aInput, Uint16 bInput,
00435 volatile _iq* aVal, volatile _iq* bVal)
00436 {
00437 Uint16 rawaVal = ReadADInputRaw(aInput);
00438 Uint16 rawbVal = ReadADInputRaw(bInput);
00439 if(adConfiguration.trigger){
00440 if(dataPtr+2 < end){
00441 WriteData(&rawaVal);
00442 WriteData(&rawbVal);
00443 }
00444 }
00445 *aVal = Bits2Units(rawaVal, aInput);
00446 *bVal = Bits2Units(rawbVal, bInput);
00447 }
00448
00449
00450
00451 static inline _iq Bits2Units(Uint16 rawVal, Uint16 input)
00452 {
00453 return _IQmpy(_IQ((int)(rawVal-adConfiguration.chlPolarity[input])),
00454 adConfiguration.chlGains[input]) +
00455 adConfiguration.chlOffsets[input];
00456 }
00457
00458
00459
00460 #endif
00461
00462
00463
00464
00465
00466