00001 /****************************************************************************** 00002 ** Copyright (C) 2007 Pablo Garcia 00003 ** 00004 ** This library is free software; you can redistribute it and/or 00005 ** modify it under the terms of the GNU Lesser General Public 00006 ** License as published by the Free Software Foundation; either 00007 ** version 2.1 of the License, or (at your option) any later version. 00008 00009 ** This library is distributed in the hope that it will be useful, 00010 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 00011 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 00012 ** Lesser General Public License for more details. 00013 00014 ** You should have received a copy of the GNU Lesser General Public 00015 ** License along with this library; if not, write to the Free Software 00016 ** Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 00017 ******************************************************************************/ 00018 00037 //----------------------------------------------------------------------------- 00038 // Define 00039 //----------------------------------------------------------------------------- 00040 00041 #ifndef CPU_H 00042 #define CPU_H 00043 00044 #ifdef __cplusplus 00045 extern "C" { 00046 #endif 00047 00048 //----------------------------------------------------------------------------- 00049 // Includes 00050 //----------------------------------------------------------------------------- 00051 #include "TIMotorLIB.h" 00052 #include GENERATE_FLEX_INC(Device.h) // DSP280x Headerfile Include File 00053 #include "IQConstants.h" // IQMath definitions 00054 00061 #define OSCCLK 30000000 ///< main oscillator frequency in Mhz 00062 /*----------------------------------------------------------------------------- 00063 Specify the PLL control register (PLLCR) and divide select (DIVSEL) value. 00064 -----------------------------------------------------------------------------*/ 00065 //#define DSP28_DIVSEL 0 // Enable /4 for SYSCLKOUT 00066 //#define DSP28_DIVSEL 1 // Enable /4 for SYSCKOUT 00067 #define DSP28_DIVSEL 2 // Enable /2 for SYSCLKOUT 00068 //#define DSP28_DIVSEL 3 // Enable /1 for SYSCLKOUT 00069 00070 #define DSP28_PLLCR 10 00071 //#define DSP28_PLLCR 9 00072 //#define DSP28_PLLCR 8 00073 //#define DSP28_PLLCR 7 00074 //#define DSP28_PLLCR 6 // Uncomment for 60 MHz devices [60 MHz = (20MHz * 6)/2] 00075 //#define DSP28_PLLCR 5 00076 //#define DSP28_PLLCR 4 00077 //#define DSP28_PLLCR 3 00078 //#define DSP28_PLLCR 2 00079 //#define DSP28_PLLCR 1 00080 //#define DSP28_PLLCR 0 // PLL is bypassed in this mode 00081 //---------------------------------------------------------------------------- 00082 00109 //#define CPU_RATE 6.667L // for a 150MHz CPU clock speed (SYSCLKOUT) 00110 //#define CPU_RATE 10.000L // for a 100MHz CPU clock speed (SYSCLKOUT) 00111 //#define CPU_RATE 13.330L // for a 75MHz CPU clock speed (SYSCLKOUT) 00112 //#define CPU_RATE 16.667L // for a 60MHz CPU clock speed (SYSCLKOUT) 00113 //#define CPU_RATE 20.000L // for a 50MHz CPU clock speed (SYSCLKOUT) 00114 //#define CPU_RATE 33.333L // for a 30MHz CPU clock speed (SYSCLKOUT) 00115 //#define CPU_RATE 41.667L // for a 24MHz CPU clock speed (SYSCLKOUT) 00116 //#define CPU_RATE 50.000L // for a 20MHz CPU clock speed (SYSCLKOUT) 00117 //#define CPU_RATE 66.667L // for a 15MHz CPU clock speed (SYSCLKOUT) 00118 //#define CPU_RATE 100.000L // for a 10MHz CPU clock speed (SYSCLKOUT) 00119 00120 00141 #if DSP28_PLLCR == 10 00142 #define CPU_RATE 6.667L // for a 150MHz CPU clock speed (SYSCLKOUT) 00143 //#define CPU_RATE 10.000L // for a 100MHz CPU clock speed (SYSCLKOUT) 00144 #define CPU_FRQ_150MHZ 1 // 150 Mhz CPU Freq - 1 for 150 MHz devices 00145 #define CPU_FRQ_100MHZ 0 // 100 Mhz CPU Freq - default, 1 for 100 MHz devices 00146 #define CPU_FRQ_60MHZ 0 // 60 MHz CPU Freq - 1 for 60 MHz devices 00147 #elif DSP28_PLLCR == 6 00148 #define CPU_RATE 16.667L // for a 60MHz CPU clock speed (SYSCLKOUT) 00149 #define CPU_FRQ_100MHZ 0 // 100 Mhz CPU Freq - default, 1 for 100 MHz devices 00150 #define CPU_FRQ_60MHZ 1 // 60 MHz CPU Freq - 1 for 60 MHz devices 00151 #endif 00152 00155 struct CPUConfiguration 00156 { 00157 Uint32 oscCLK; 00158 Uint16 dsp28_DIVSEL; 00159 Uint16 dsp28_PLLCR; 00160 Uint16 hspCLK; 00161 Uint16 lspCLK; 00162 }; 00163 00164 00165 extern volatile struct CPUConfiguration cpuConf; 00166 00167 00168 extern void DSP28x_usDelay(Uint32 Count); 00169 00172 00174 #define DELAY_US(A) DSP28x_usDelay(((((long double) A * 1000.0L) / (long double)CPU_RATE) - 9.0L) / 5.0L) 00175 00179 #define US2CLOCK(A, PRRSC) ( (A / (CPU_RATE / 1000.0L) ) / PRRSC) 00180 00184 #define CPUINMHZ() (OSCCLK*DSP28_PLLCR/1000000) >> (~DSP28_DIVSEL & 0x3) 00185 00189 #define CPUINHZ() ((Uint32)(CPUINMHZ())*(Uint32)1000000) 00190 00191 // same but with static inline functions 00192 00194 static inline Uint32 Us2Clock(Uint16 us, Uint16 prrsc) 00195 { 00196 return (us / (CPU_RATE / 1000.0L) ) / prrsc; 00197 } 00198 00199 //----------------------------------------------------------------------------- 00200 00203 static inline Uint16 CpuInMhz(void) 00204 { 00205 return (cpuConf.oscCLK*cpuConf.dsp28_PLLCR/1000000) >> (~cpuConf.dsp28_DIVSEL & 0x3); 00206 } 00207 00208 //----------------------------------------------------------------------------- 00209 00212 static inline Uint32 CpuInHz(void) 00213 { 00214 return ((Uint32)(CpuInMhz())*(Uint32)1000000); 00215 } 00216 00217 //----------------------------------------------------------------------------- 00218 00221 static inline _iq HspCLKInMhz(void) 00222 { 00223 return cpuConf.hspCLK > 0 ? _IQdiv(_IQ(CpuInMhz()), _IQ(cpuConf.hspCLK)) : _IQ(CpuInMhz()); 00224 } 00225 00226 //----------------------------------------------------------------------------- 00227 00230 static inline _iq LspCLKInMhz(void) 00231 { 00232 return cpuConf.lspCLK > 0 ? _IQdiv(_IQ(CpuInMhz()), _IQ(cpuConf.lspCLK)) : _IQ(CpuInMhz()); 00233 } 00234 00235 //----------------------------------------------------------------------------- 00236 00237 00239 #define SETIDLEMODE (SysCtrlRegs.LPMCR0.bit.LPM=0) 00240 00241 #define IDLE asm(" IDLE") 00242 00243 //----------------------------------------------------------------------------- 00244 // Implemented Functions 00245 //----------------------------------------------------------------------------- 00246 00247 00248 //----------------------------------------------------------------------------- 00264 //----------------------------------------------------------------------------- 00265 extern void InitCPU(Uint32 oscCLK, Uint16 dsp28_DIVSEL, Uint16 dsp28_PLLCR, 00266 Uint16 hspCLK, Uint16 lspCLK); 00267 00268 00269 //--------------------------------------------------------------------------- 00275 //--------------------------------------------------------------------------- 00276 extern void InitSysCtrl(void); 00277 00278 //--------------------------------------------------------------------------- 00281 //--------------------------------------------------------------------------- 00282 extern void InitPieCtrl(void); 00283 00284 //--------------------------------------------------------------------------- 00286 //--------------------------------------------------------------------------- 00287 extern void InitPieVectTable(void); 00288 00289 //--------------------------------------------------------------------------- 00291 //--------------------------------------------------------------------------- 00292 extern void EnableInterrupts(void); 00293 00294 //--------------------------------------------------------------------------- 00297 //--------------------------------------------------------------------------- 00298 extern void ServiceDog(void); 00299 00300 00301 //--------------------------------------------------------------------------- 00303 //--------------------------------------------------------------------------- 00304 extern void DisableDog(void); 00305 00306 //--------------------------------------------------------------------------- 00308 //--------------------------------------------------------------------------- 00309 extern void InitPll(Uint16 val, Uint16 clkindiv); 00310 00311 //--------------------------------------------------------------------------- 00313 //--------------------------------------------------------------------------- 00314 extern void InitPeripheralClocks(void); 00315 00316 #ifdef __cplusplus 00317 } 00318 #endif /* extern "C" */ 00319 00320 #endif 00321 00322 //----------------------------------------------------------------------------- 00323 // End Of File 00324 //----------------------------------------------------------------------------- 00325