00001 /****************************************************************************** 00002 ** Copyright (C) 2007 Pablo Garcia 00003 ** 00004 ** This library is free software; you can redistribute it and/or 00005 ** modify it under the terms of the GNU Lesser General Public 00006 ** License as published by the Free Software Foundation; either 00007 ** version 2.1 of the License, or (at your option) any later version. 00008 00009 ** This library is distributed in the hope that it will be useful, 00010 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 00011 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 00012 ** Lesser General Public License for more details. 00013 00014 ** You should have received a copy of the GNU Lesser General Public 00015 ** License along with this library; if not, write to the Free Software 00016 ** Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 00017 ******************************************************************************/ 00018 00019 //----------------------------------------------------------------------------- 00020 // Includes 00021 //----------------------------------------------------------------------------- 00022 #include "cpuTimers.h" 00023 #include "cpu.h" 00024 00025 //----------------------------------------------------------------------------- 00026 // variables 00027 // ---------------------------------------------------------------------------- 00028 // CPUTimers data structures 00029 struct CPUTIMER_VARSIQ TIMLCpuTimer0; 00030 struct CPUTIMER_VARSIQ TIMLCpuTimer1; 00031 struct CPUTIMER_VARSIQ TIMLCpuTimer2; 00032 00033 // ---------------------------------------------------------------------------- 00034 00035 void InitCpuTimers(void) 00036 { 00037 InitCpuTimer(CPUTIMER0); 00038 InitCpuTimer(CPUTIMER1); 00039 InitCpuTimer(CPUTIMER2); 00040 } 00041 00042 // ---------------------------------------------------------------------------- 00043 00044 void InitCpuTimer(CPUTIMERSEnum cpuTimer) 00045 { 00046 volatile struct CPUTIMER_REGS *RegsAddr = 0; 00047 switch(cpuTimer){ 00048 case CPUTIMER0: 00049 TIMLCpuTimer0.RegsAddr = RegsAddr = &CpuTimer0Regs; 00050 break; 00051 case CPUTIMER1: 00052 TIMLCpuTimer1.RegsAddr = RegsAddr = &CpuTimer1Regs; 00053 break; 00054 case CPUTIMER2: 00055 TIMLCpuTimer2.RegsAddr = RegsAddr = &CpuTimer2Regs; 00056 break; 00057 } 00058 // Initialize timer period to maximum: 00059 RegsAddr->PRD.all = 0xFFFFFFFF; 00060 // Initialize pre-scale counter to divide by 1 (SYSCLKOUT): 00061 RegsAddr->TPR.all = 0; 00062 RegsAddr->TPRH.all = 0; 00063 // Make sure timer is stopped: 00064 RegsAddr->TCR.bit.TSS = 1; 00065 // Reload all counter register with period value: 00066 RegsAddr->TCR.bit.TRB = 1; 00067 } 00068 00069 // ---------------------------------------------------------------------------- 00070 00071 void ConfigureCpuTimer(CPUTIMERSEnum cpuTimer, Uint32 Period, void(*interruptFCN)(void)) 00072 { 00073 struct CPUTIMER_VARSIQ *Timer = 0; 00074 InitCpuTimer(cpuTimer); 00075 switch(cpuTimer){ 00076 case CPUTIMER0: 00077 Timer = &TIMLCpuTimer0; 00078 break; 00079 case CPUTIMER1: 00080 Timer = &TIMLCpuTimer1; 00081 break; 00082 case CPUTIMER2: 00083 Timer = &TIMLCpuTimer2; 00084 break; 00085 } 00086 // Initialize timer period: 00087 Timer->CPUFreqInMHz = CPUINMHZ(); 00088 Timer->PeriodInUSec = Period; 00089 Timer->RegsAddr->PRD.all = (long) (Timer->CPUFreqInMHz * Timer->PeriodInUSec); 00090 00091 // Set pre-scale counter to divide by 1 (SYSCLKOUT): 00092 // PABLO: maximum timer value with 75Mhz SYSCLKOUT = (2^32-1)/75000000 = 57.3 s 00093 Timer->RegsAddr->TPR.all = 0; 00094 Timer->RegsAddr->TPRH.all = 0; 00095 00096 // Initialize timer control register: 00097 Timer->RegsAddr->TCR.bit.TSS = 1; // 1 = Stop timer, 0 = Start/Restart Timer 00098 Timer->RegsAddr->TCR.bit.TRB = 1; // 1 = reload timer 00099 Timer->RegsAddr->TCR.bit.SOFT = 0; 00100 Timer->RegsAddr->TCR.bit.FREE = 0; // Timer Free Run Disabled 00101 Timer->RegsAddr->TCR.bit.TIE = 0; // Disable Timer Interrupt 00102 if(interruptFCN != 0){ 00103 Timer->RegsAddr->TCR.bit.TIE = 1; // Enable Timer Interrupt 00104 // ISR 00105 switch(cpuTimer){ 00106 case CPUTIMER0: 00107 EALLOW; 00108 PieVectTable.TINT0 = interruptFCN; 00109 EDIS; 00110 // Enable CPU INT1 which is connected to TIMER0 INT: 00111 IER |= M_INT1; 00112 PieCtrlRegs.PIEIER1.bit.INTx7 = 1; // TIMER0 00113 break; 00114 case CPUTIMER1: 00115 // Enable CPU INT13 which is connected to TIMER1 INT: 00116 IER |= M_INT13; 00117 // PABLO: not connected to PIE --> (spru566d.pdf) 00118 break; 00119 case CPUTIMER2: 00120 EALLOW; 00121 PieVectTable.TINT2 = interruptFCN; 00122 EDIS; 00123 // Enable CPU INT14 which is connected to TIMER2 INT: 00124 IER |= M_INT14; 00125 // PABLO: not connected to PIE --> (spru566d.pdf) 00126 break; 00127 } 00128 } 00129 } 00130 00131 // ---------------------------------------------------------------------------- 00132 00133 //----------------------------------------------------------------------------- 00134 // End Of File 00135 //----------------------------------------------------------------------------- 00136