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00022 #include "Epwm.h"
00023 #include "cpu.h"
00024 #include "gpio.h"
00025
00026
00027
00028
00029 volatile struct PWM3phConfiguration pwmConf;
00030 volatile struct PWM3phConfiguration pwmAConf;
00031 volatile struct PWM3phConfiguration pwmBConf;
00032 extern const Uint16 _offsetPWM;
00033 volatile struct EPWM_REGS *ePWM[] = {&EPwm1Regs, &EPwm2Regs, &EPwm3Regs, &EPwm4Regs,
00034 &EPwm5Regs, &EPwm6Regs};
00035 volatile Uint16* cmpPtr[PWM_OUTPUTS_SIZE];
00036 int MEP_ScaleFactor[PWM_CH] = {0,0,0,0,0};
00037 int MEP_SF1, MEP_SF2, MEP_SF3, MEP_SF4, MEP_SF5, MEP_SF6;
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055 static const Uint16 clkMat[] = {1, 2, 4, 8, 32, 64, 128};
00056
00057 static const Uint16 hspClkMat[] = {1, 2, 4, 6, 8, 10, 12};
00058
00059 static const Uint16 hspClkIndxMat[] = {0, 1, 2, 3, 4, 5, 6, 4, 5, 6, 4, 5, 6,
00060 4, 5, 6, 2, 3, 4, 5, 6, 4, 5, 6, 4, 5, 6};
00061
00062 static const Uint16 lspClkIndxMat[] = {0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2,
00063 3, 3, 3, 4, 4, 4, 4, 4, 5, 5, 5, 6, 6, 6};
00064
00065
00066
00067
00068
00069 void BindPWMOutputs(void)
00070 {
00071 int i;
00072
00073 cmpPtr[PWM1+xA] = &(EPwm1Regs.CMPA.half.CMPA);
00074 cmpPtr[PWM1+xB] = &(EPwm1Regs.CMPB);
00075 cmpPtr[PWM2+xA] = &(EPwm2Regs.CMPA.half.CMPA);
00076 cmpPtr[PWM2+xB] = &(EPwm2Regs.CMPB);
00077 cmpPtr[PWM3+xA] = &(EPwm3Regs.CMPA.half.CMPA);
00078 cmpPtr[PWM3+xB] = &(EPwm3Regs.CMPB);
00079 cmpPtr[PWM4+xA] = &(EPwm4Regs.CMPA.half.CMPA);
00080 cmpPtr[PWM4+xB] = &(EPwm4Regs.CMPB);
00081 cmpPtr[PWM5+xA] = &(EPwm5Regs.CMPA.half.CMPA);
00082 cmpPtr[PWM5+xB] = &(EPwm5Regs.CMPB);
00083 cmpPtr[PWM6+xA] = &(EPwm6Regs.CMPA.half.CMPA);
00084 cmpPtr[PWM6+xB] = &(EPwm6Regs.CMPB);
00085
00086 for(i=0;i<PWM_CH;i++){
00087 MEP_ScaleFactor[i] =0;
00088 }
00089
00090
00091 for(i=1;i<PWM_CH;i++){
00092 while ( SFO_MepDis_V5(i) == SFO_INCOMPLETE );
00093 }
00094
00095
00096 MEP_ScaleFactor[0] = MEP_ScaleFactor[1];
00097
00098 }
00099
00100
00101
00103 static inline void CalculatePrescalerBits(Uint16 tpwm_us,Uint16* hspClkDiv, Uint16* clkDiv)
00104 {
00105
00106 const Uint16 maxIndx = 28;
00107 const Uint32 initVal = (Uint32)tpwm_us*CpuInMhz();
00108 Uint32 ctrVal = initVal;
00109 Uint16 indx;
00110 for (indx = 0;indx<maxIndx;indx++) {
00111 ctrVal = initVal/(hspClkMat[hspClkIndxMat[indx]]*
00112 clkMat[lspClkIndxMat[indx]]);
00113 if(ctrVal<=65535)
00114 break;
00115 }
00116 *hspClkDiv = hspClkIndxMat[indx];
00117 *clkDiv = lspClkIndxMat[indx];
00118 }
00119
00120
00121
00122 void InitPWMSide(ePWMenum PWM, sideEnum side, PWMMODULATION modulation,
00123 SWITCHLOGIC switchLogic)
00124 {
00125 volatile struct EPWM_REGS* pwmPtr = ePWM[PWM];
00126 if(side == xA){
00127 cmpPtr[PWM+xA] = &(pwmPtr->CMPA.half.CMPA);
00128
00129 pwmPtr->CMPCTL.bit.SHDWAMODE = CC_SHADOW;
00130 pwmPtr->CMPCTL.bit.LOADAMODE = modulation;
00131
00132 pwmPtr->AQCTLA.bit.CAU = ~switchLogic;
00133 pwmPtr->AQCTLA.bit.CAD = switchLogic;
00134 }
00135 else{
00136 cmpPtr[PWM+xB] = &(pwmPtr->CMPB);
00137 pwmPtr->CMPCTL.bit.SHDWBMODE = CC_SHADOW;
00138 pwmPtr->CMPCTL.bit.LOADBMODE = modulation;
00139
00140 pwmPtr->AQCTLB.bit.CBU = ~switchLogic;
00141 pwmPtr->AQCTLB.bit.CBD = switchLogic;
00142 }
00143 }
00144
00145
00146
00147 void InitSinglePWMOutput(void(*interruptFCN)(void), ePWMenum PWM, sideEnum side, Uint16 tpwm_us,
00148 PHSEN phSen, PWMMODE pwmMode, SYNCOSEL syncMode, PWMCARRIER pwmCarrier,
00149 PWMMODULATION modulation, INTSEL intSel, SWITCHLOGIC switchLogic)
00150 {
00151 volatile struct EPWM_REGS* pwmPtr = ePWM[PWM];
00152 Uint16 PRRSC = 1;
00153 Uint16 hspClkDiv, clkDiv;
00154
00155 InitEPWMGpio(PWM);
00156
00157 EALLOW;
00158 SysCtrlRegs.PCLKCR1.all |= 1 << PWM;
00159
00160
00161 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00162 EDIS;
00163
00164
00165 CalculatePrescalerBits(tpwm_us,&hspClkDiv, &clkDiv);
00166 pwmPtr->TBCTL.bit.CLKDIV = clkDiv;
00167 pwmPtr->TBCTL.bit.HSPCLKDIV = hspClkDiv;
00168 PRRSC *= (1 << pwmPtr->TBCTL.bit.CLKDIV);
00169 if(pwmPtr->TBCTL.bit.HSPCLKDIV != TB_DIV1)
00170 PRRSC *= 2*pwmPtr->TBCTL.bit.HSPCLKDIV;
00171
00172
00173 pwmPtr->TBCTL.bit.CTRMODE = pwmCarrier;
00174 pwmPtr->TBCTL.bit.PRDLD = TB_IMMEDIATE;;
00175
00176 if(pwmCarrier == TB_COUNT_UPDOWN)
00177 pwmPtr->TBPRD = US2CLOCK(tpwm_us, PRRSC)/2;
00178 else if(pwmCarrier == TB_COUNT_UP)
00179 pwmPtr->TBPRD = US2CLOCK(tpwm_us, PRRSC)-1;
00180 pwmPtr->TBCTL.bit.PHSEN = phSen;
00181 pwmPtr->TBCTL.bit.SYNCOSEL = syncMode;
00182 InitPWMSide(PWM, side, modulation, switchLogic);
00183
00184
00185
00186
00187
00188 if(pwmMode == HRPWM_MODE){
00189 EALLOW;
00190 pwmPtr->HRCNFG.all = 0x0;
00191 pwmPtr->HRCNFG.bit.EDGMODE = HR_FEP;
00192 pwmPtr->HRCNFG.bit.CTLMODE = HR_CMP;
00193 pwmPtr->HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
00194
00195
00196
00197
00198 EDIS;
00199 }
00200 if(interruptFCN !=0){
00201 pwmPtr->ETSEL.bit.INTSEL = intSel;
00202 pwmPtr->ETSEL.bit.INTEN = 1;
00203 pwmPtr->ETPS.bit.INTPRD = ET_1ST;
00204
00205 EALLOW;
00206 *(&PieVectTable.EPWM1_INT + PWM) = interruptFCN;
00207 EDIS;
00208
00209 IER |= M_INT3;
00210
00211 PieCtrlRegs.PIEIER3.all |= 1 << PWM;
00212 }
00213 }
00214
00215
00216
00217 void InitComplementaryPWMOutput(void(*interruptFCN)(void), ePWMenum PWM, Uint16 tpwm_us,
00218 Uint16 db_us, PHSEN phSen, PWMMODE pwmMode, PWMCARRIER pwmCarrier, PWMMODULATION modulation,
00219 INTSEL intSel, SWITCHLOGIC switchLogic)
00220 {
00221 volatile struct EPWM_REGS* pwmPtr = ePWM[PWM];
00222 InitEPWMGpio(PWM);
00223
00224 cmpPtr[PWM+xA] = &(pwmPtr->CMPA.half.CMPA);
00225
00226 EALLOW;
00227 SysCtrlRegs.PCLKCR1.all |= 1 << PWM;
00228
00229
00230 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00231 EDIS;
00232 ConfigurePWMLeg(pwmPtr, phSen, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00233
00234 if(pwmMode == HRPWM_MODE){
00235 EALLOW;
00236 pwmPtr->HRCNFG.all = 0x0;
00237 pwmPtr->HRCNFG.bit.EDGMODE = HR_FEP;
00238 pwmPtr->HRCNFG.bit.CTLMODE = HR_CMP;
00239 pwmPtr->HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
00240
00241
00242
00243
00244 EDIS;
00245 }
00246 if(interruptFCN !=0){
00247 pwmPtr->ETSEL.bit.INTSEL = intSel;
00248 pwmPtr->ETSEL.bit.INTEN = 1;
00249 pwmPtr->ETPS.bit.INTPRD = ET_1ST;
00250
00251 EALLOW;
00252 *(&PieVectTable.EPWM1_INT + PWM) = interruptFCN;
00253 EDIS;
00254
00255 IER |= M_INT3;
00256
00257 PieCtrlRegs.PIEIER3.all |= 1 << PWM;
00258 }
00259 }
00260
00261
00262
00263 void Init3phPWM(void(*interruptFCN)(void), EPWMX epwmX, Uint16 tpwm_us,
00264 Uint16 db_us, PWMCARRIER pwmCarrier, PWMMODULATION modulation, INTSEL intSel,
00265 _iq vBus, ePWMSOC soc, SOCTrigger trigger, SWITCHLOGIC switchLogic)
00266 {
00267 volatile struct EPWM_REGS* pwm1Ptr = 0;
00268 volatile struct EPWM_REGS* pwm2Ptr = 0;
00269 volatile struct EPWM_REGS* pwm3Ptr = 0;
00270 pwmConf.epwmX = epwmX;
00271 pwmConf.t_pwm = tpwm_us;
00272 if(epwmX == EPWMA){
00273 InitEPWMGpio(PWM1);
00274 InitEPWMGpio(PWM2);
00275 InitEPWMGpio(PWM3);
00276 pwm1Ptr = &EPwm1Regs;
00277 pwm2Ptr = &EPwm2Regs;
00278 pwm3Ptr = &EPwm3Regs;
00279 }
00280 else{
00281 InitEPWMGpio(PWM4);
00282 InitEPWMGpio(PWM5);
00283 InitEPWMGpio(PWM6);
00284 pwm1Ptr = &EPwm4Regs;
00285 pwm2Ptr = &EPwm5Regs;
00286 pwm3Ptr = &EPwm6Regs;
00287 }
00288
00289 pwmConf.cmp1 = &(pwm1Ptr->CMPA.half.CMPA);
00290 pwmConf.cmp2 = &(pwm2Ptr->CMPA.half.CMPA);
00291 pwmConf.cmp3 = &(pwm3Ptr->CMPA.half.CMPA);
00292
00293 InitPWMPeripheralClocks();
00294
00295
00296 EALLOW;
00297 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00298 EDIS;
00299 ConfigurePWMLeg(pwm1Ptr, MASTERPWM, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00300 ConfigurePWMLeg(pwm2Ptr, SLAVEPWM, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00301 ConfigurePWMLeg(pwm3Ptr, SLAVEPWM, tpwm_us, db_us, pwmCarrier, modulation, switchLogic);
00302
00303 pwm1Ptr->ETSEL.bit.INTSEL = intSel;
00304 pwm1Ptr->ETSEL.bit.INTEN = 1;
00305 pwm1Ptr->ETPS.bit.INTPRD = ET_1ST;
00306 AddEventTrigger(pwm1Ptr, soc, trigger);
00307
00308
00309
00310
00311
00312
00313
00314
00315
00316
00317 if(interruptFCN != 0){
00318
00319 IER |= M_INT3;
00320 if(epwmX == EPWMA){
00321
00322 EALLOW;
00323 PieVectTable.EPWM1_INT = interruptFCN;
00324 EDIS;
00325 PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
00326 }
00327 else{
00328
00329 EALLOW;
00330 PieVectTable.EPWM4_INT = interruptFCN;
00331 EDIS;
00332 PieCtrlRegs.PIEIER3.bit.INTx4 = 1;
00333 }
00334 }
00335
00336 pwmConf.OFFSETPWM = pwm1Ptr->TBPRD >> 1;
00337 pwmConf.OFFSETPWMDIVVBUS = _IQdiv(_IQ(pwmConf.OFFSETPWM),vBus >> 1);
00338 pwmConf.vBus = vBus;
00339
00340 if(epwmX == EPWMA)
00341 pwmAConf = pwmConf;
00342 else
00343 pwmBConf = pwmConf;
00344 }
00345
00346
00347
00348 void ConfigurePWMLeg(volatile struct EPWM_REGS* pwmPtr, PHSEN master,
00349 Uint16 tpwm_us, Uint16 db_us, PWMCARRIER pwmCarrier, PWMMODULATION modulation,
00350 unsigned int polSel)
00351 {
00352
00353
00354 Uint16 PRRSC = 1;
00355 Uint16 hspClkDiv, clkDiv;
00356
00357 CalculatePrescalerBits(tpwm_us,&hspClkDiv, &clkDiv);
00358 pwmPtr->TBCTL.bit.CLKDIV = clkDiv;
00359 pwmPtr->TBCTL.bit.HSPCLKDIV = hspClkDiv;
00360 PRRSC *= (1 << pwmPtr->TBCTL.bit.CLKDIV);
00361 if(pwmPtr->TBCTL.bit.HSPCLKDIV != TB_DIV1)
00362 PRRSC *= 2*pwmPtr->TBCTL.bit.HSPCLKDIV;
00363
00364
00365
00366 pwmPtr->TBCTL.bit.CTRMODE = pwmCarrier;
00367 if(pwmPtr->TBCTL.bit.CTRMODE == TB_COUNT_UPDOWN)
00368 pwmPtr->TBPRD = US2CLOCK(pwmConf.t_pwm, PRRSC)/2;
00369 else
00370 pwmPtr->TBPRD = US2CLOCK(pwmConf.t_pwm, PRRSC)-1;
00371 pwmPtr->TBPHS.half.TBPHS = 0;
00372 pwmPtr->TBCTL.bit.PHSEN = master;
00373 pwmPtr->TBCTL.bit.PRDLD = CC_SHADOW;
00374 pwmPtr->TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
00375
00376 pwmPtr->CMPCTL.bit.SHDWAMODE = CC_SHADOW;
00377 pwmPtr->CMPCTL.bit.SHDWBMODE = CC_SHADOW;
00378 pwmPtr->CMPCTL.bit.LOADAMODE = modulation;
00379 pwmPtr->CMPCTL.bit.LOADBMODE = modulation;
00380
00381 pwmPtr->AQCTLA.bit.CAU = ~polSel;
00382 pwmPtr->AQCTLA.bit.CAD = polSel;
00383
00384 pwmPtr->DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
00385 pwmPtr->DBCTL.bit.POLSEL = polSel;
00386
00387 pwmPtr->DBFED = US2CLOCK(db_us, PRRSC);
00388 pwmPtr->DBRED = US2CLOCK(db_us, PRRSC);
00389 }
00390
00391
00392
00393
00394 void AddEventTrigger(volatile struct EPWM_REGS* pwmPtr,
00395 ePWMSOC soc, SOCTrigger trigger)
00396 {
00397 if(soc == SOCA){
00398 pwmPtr->ETSEL.bit.SOCAEN = 1;
00399 pwmPtr->ETSEL.bit.SOCASEL = trigger;
00400 pwmPtr->ETPS.bit.SOCAPRD = 1;
00401 }
00402 else if(soc == SOCB){
00403 pwmPtr->ETSEL.bit.SOCBEN = 1;
00404 pwmPtr->ETSEL.bit.SOCBSEL = trigger;
00405 pwmPtr->ETPS.bit.SOCBPRD = 1;
00406 }
00407 }
00408
00409
00410
00411 void InitPWMPeripheralClocks(void)
00412 {
00413 EALLOW;
00414 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00415 if(pwmConf.epwmX == EPWMA){
00416 SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;
00417 SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;
00418 SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;
00419 }
00420 else{
00421 SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1;
00422 SysCtrlRegs.PCLKCR1.bit.EPWM5ENCLK = 1;
00423 SysCtrlRegs.PCLKCR1.bit.EPWM6ENCLK = 1;
00424 }
00425
00426 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
00427 EDIS;
00428 }
00429
00430
00431
00432 void InitPWMAPeripheralClocks(void)
00433 {
00434 EALLOW;
00435 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00436 SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;
00437 SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;
00438 SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;
00439
00440 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
00441 EDIS;
00442 }
00443
00444
00445
00446 void InitPWMBPeripheralClocks(void)
00447 {
00448 EALLOW;
00449 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
00450 SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1;
00451 SysCtrlRegs.PCLKCR1.bit.EPWM5ENCLK = 1;
00452 SysCtrlRegs.PCLKCR1.bit.EPWM6ENCLK = 1;
00453
00454 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
00455 EDIS;
00456 }
00457
00458
00459
00460 void InitEPWMGpio(ePWMenum ePWM)
00461 {
00462
00463
00464
00465 switch(ePWM){
00466 case PWM1:
00467 ConfigureGPIOPort(_GPIO0, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00468 ConfigureGPIOPort(_GPIO1, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00469 break;
00470 case PWM2:
00471 ConfigureGPIOPort(_GPIO2, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00472 ConfigureGPIOPort(_GPIO3, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00473 break;
00474 case PWM3:
00475 ConfigureGPIOPort(_GPIO4, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00476 ConfigureGPIOPort(_GPIO5, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00477 break;
00478 case PWM4:
00479 ConfigureGPIOPort(_GPIO6, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00480 ConfigureGPIOPort(_GPIO7, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00481 break;
00482 case PWM5:
00483 ConfigureGPIOPort(_GPIO8, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00484 ConfigureGPIOPort(_GPIO9, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00485 break;
00486 case PWM6:
00487 ConfigureGPIOPort(_GPIO10, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00488 ConfigureGPIOPort(_GPIO11, GPIO_OUTPUT, PERPH_1, GPIO_PULL_EN, GPIO_LOW);
00489 break;
00490 }
00491 }
00492
00493
00494
00495 void InitTzGpio(void)
00496 {
00497 EALLOW;
00498
00499
00500
00501
00502
00503 GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;
00504 GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;
00505 GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;
00506 GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;
00507 GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;
00508 GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;
00509
00510
00511
00512
00513
00514
00515 GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3;
00516 GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3;
00517 GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3;
00518 GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3;
00519 GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3;
00520 GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3;
00521
00522
00523
00524
00525
00526 GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;
00527 GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;
00528 GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1;
00529 GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1;
00530 GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 3;
00531 GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 3;
00532
00533 EDIS;
00534 }
00535
00536
00537
00538
00539
00540